diff options
| author | Joakim Hernberg <jhernberg@alchemy.lu> | 2016-06-30 21:39:22 +0200 |
|---|---|---|
| committer | Joakim Hernberg <jhernberg@alchemy.lu> | 2016-06-30 21:39:22 +0200 |
| commit | eaab2a6373909962fb66f24cd1a2de5063dd6c0e (patch) | |
| tree | 91d0b3259e8a66aac480e292a891cfa50e154000 /0001-sdhci-revert.patch | |
| parent | e5460dffa665d9b12c04835003209c027ef31d64 (diff) | |
bump to 4.4.12_rt19-1
Diffstat (limited to '0001-sdhci-revert.patch')
| -rw-r--r-- | 0001-sdhci-revert.patch | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/0001-sdhci-revert.patch b/0001-sdhci-revert.patch new file mode 100644 index 0000000..5d4afd6 --- /dev/null +++ b/0001-sdhci-revert.patch @@ -0,0 +1,25 @@ +index 2cadf08..b48565e 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -1895,9 +1895,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) + tuning_count = host->tuning_count; + + /* +- * The Host Controller needs tuning only in case of SDR104 mode +- * and for SDR50 mode when Use Tuning for SDR50 is set in the +- * Capabilities register. ++ * The Host Controller needs tuning in case of SDR104 and DDR50 ++ * mode, and for SDR50 mode when Use Tuning for SDR50 is set in ++ * the Capabilities register. + * If the Host Controller supports the HS200 mode then the + * tuning function has to be executed. + */ +@@ -1917,6 +1917,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) + break; + + case MMC_TIMING_UHS_SDR104: ++ case MMC_TIMING_UHS_DDR50: + break; + + case MMC_TIMING_UHS_SDR50: +generated by cgit v0.11.2 at 2016-01-01 22:11:38 (GMT) |